My primary research interest is formal methods for reliability and dependability of embedded systems. I am also interested in problems prevalent in compilers and architectures for high performance systems. For more information, please check http://cse.iitkgp.ac.in/~soumya/
Multi-rate Sampling for Power-Performance Trade-off in Embedded Control by Dasgupta P., Dey S. , R. R., S. D. IEEE Embedded Systems Letters 8 77-80 (2016)
RELSPEC: A Framework for Reliability Aware Design of Component based Embedded Systems by Dey S., Chakrabarti P. P., Ghosh S. K., P. V., Vadlamudi S. G., A. H. Design Automation for Embedded Systems 21 37-87 (2017)
A Tag Machine based Performance Evaluation Method for Job-Shop Schedules by Soumyajit Dey, Dipankar Sarkar, Anupam Basu IEEE Transaction CAD 29(7) 1028-1041 (2010)
Architectural Optimizations for Text to Speech Synthesis in Embedded Systems by Soumyajit Dey, Monu Kedia, Anupam ASP-DAC - (2007)
Adaptive Sharing of Sampling Rates among Software Based Controllers by Rajorshee Raha, Soumyajit Dey, Pallab Dasgupta IEEE Multi - Conference on System and Control (MSC) - (2015)
Integrating Formal Methods with Testing for Reliability Estimation of Component Based Systems by Debasmita Lohar, Soumyajit Dey International Symposium on Software Reliability Engineering (ISSRE), Industry Track - (2015)
RELSPEC: A Framework for Early Reliability Refinement of Embedded Applications by Saurav Kumar Ghosh, Aritra Hazra and Soumyajit Dey IEEE International Conference on VLSI Design - (2015)
An Approach to Software Performance Evaluation on Customized Embedded Processors by Soumyajit Dey, Monu Kedia, Anupam Basu International Conference on VLSI Design - (2008)
Embedded Support Vector Machine: Architectural Enhancements and Evaluation by Soumyajit Dey, Monu Kedia, Niket Agarwal, Anupam Basu International Conference on VLSI Design - (2007)
An Approach to Architectural Enhancement for Embedded Speech Applications by Soumyajit Dey, Susmit Biswas, Arijit Mukhopadhyay Anupam Basu International Conference on VLSI Design - (2006)
An OpenCL Runtime System for Scheduling Data Parallel Workloads on Heterogeneous Clusters Science and Engineering Research Board (SERB)
Architectural and Algorithmic Optimizations for Speech Based Communication Interfaces on Mobile Device INTEL TECHNOLOGY INDIA PVT. LTD.
A Software Tool for the Planning and Design of Smart Micro Power Grids (Proposal ID - 6158) Ministry of Power, GoI
FMSAFE: A Networked Centre for Formal Methods in Validation and Certification Procededures for Safety - Critical ICT Systems Ministry of Human Resource Development, Department of Higher Education, Government of India
FMSAFE: A Networked Centre for Formal Methods in Validation and Certification Procededures for Safety - Critical ICT Systems at IIT Kharagpur Ministry of Railways
Intel embedded innovation lablet Intel Semiconductor (US) Limited
Opened & Intelligent Plug-in Hybrid Electric Vehicle (PHEV) Technologies for Smart Indian Cities Ministry of Heavy Industries and Public Enterprises, GoI
RTOS Validation and Development Support Hindustan Aeronautics Limited, MCSRDC Division
Safety Assurance in Automotive Electronics Synopsys Inc.
Synopsys CAD Laboratory Project Phase II Synopsys Inc.
Synthesizing test programs as directed test families for incremental CPU validation INTEL TECHNOLOGY INDIA PVT. LTD.
Area of Research: Formal Verification of systems
Area of Research: Formal Verification
Saurav Kr. Ghosh
Area of Research: Formal Analysis of probabilistic programs
Rajib Lochan Jana
Area of Research: Formal Fethods for Embedded System Design
Thakkar Jay Ashwinbhai
Area of Research: Formal Verification
Area of Research: Compilation and Runtime Techniques for High performance Architectures
Area of Research: Speech Processing in GPGPU platforms