The area of my research work is Analog CMOS VLSI Circuit/System Design. Activities in my research team can be broadly classified in to two categories. The first one involves architecture development and prototype design of analog circuits/systems in three specific topics namely, Interface unit for high speed data link, On-chip DC-DC converter and Signal acquisition front-end. The second category of our work is about developing and prototyping automatable design methodologies for frequently used analog circuits/systems.
For high speed data link we have proposed a number of power efficient high speed data receivers and transmitters with active terminator. Some of our design also enables simultaneous two-way data transmission over a common link.
We have proposed a switching scheme for switched-capacitor based DC-DC converter which improves the power efficiency by 5-10%. We have proposed a scheme of dynamically adjusting switching frequency of switched-capacitor based DC-DC converter which helps to maintain high power efficiency across wide range of load current. Both, the switching scheme and switching frequency adjustment are generic enough to be applied for buck and boost converters.
CMOS Op-Amp Sizing Using a Geometric Programming Formulation by P. Mandal and V. Visvanathan Transactions on Computer Aided Design of Integrated Circuits and Systems IEEE, No. 1, Vol 20 22-38 (2001)
A High Performance Switched Capacitor Based DC-DC Buck Converter Suitable for Embedded Power Management Applications by Biswajit Maiti and P. Mandal Trans. On VLSI IEEE, No. 10, Vol. 20, 1880-1885 (2012)
A Pseudo Cross-Coupled Switch-Capacitor based DCDC Boost Converter for High Efficiency and High Power-Density by Tamal Das, Sankalan Prasad, Samiran Dam and Pradip Mandal Transactions on Power Electronics IEEE, No. 11, Vol. 29, 5961-5974 (2014)
Self Biasing of High Performance Folded Cascode CMOS Op-Amp by P. Mandal and V. Visvanathan International Journal of Electronics Taylor & Francis, No.9, Vol. 87 795- 808 (2000)
A new current-mode receiver for high-speed electrical/optical link by Vijaya Sankara Rao P. and P. Mandal International Journal of Electronics and Communication Elsevier, No. 2, Vol. 65, 107-116 (2011)
A low impedance receiver for power efficient current mode signaling across on-chip global interconnects by Nijwm Wary and P. Mandal International Journal of Electronics and Communications Elsevier, Volume 68, No.10 969-975 (2014)
A Spur Reducing Architecture of Frequency Synthesizer using Switched Capacitors by Debashis Mandal, Pradip Mandal, and Tarun Kanti Bhattacharyya Circuits, Devices Systems IET, No. 4, Vol. 8, 237-245 (2014)
ISGP: Iterative Sequential Geometric Programming for Precise and Robust Analog Circuit Sizing by Sudip Kundu, and Pradip Mandal Integration, the VLSI Journal Elsevier, No. 4, Vol. 47, 510-531 (2014)
Design and Implementation of an Area and Power Efficient Switched-Capacitor Based Embedded DC-DC Converter by Biswajit Maity, Soumya Gangula and P. Mandal Journal of Low Power Electronics American Scientific Publishers, No. 2, Vol. 8, 207-222 (2012)
Modeling and Design of CMOS Analog Circuits through Hierarchical Abstraction by Samiran Dam and P. Mandal Integration, the VLSI Journal Elsevier, No. 4, Vol. 46, 449-462 (2013)
Design & Implementation of a 250 MSPS, 8 bit ADC in Sub-Micron Technology for Space Application KCSTC
Area of Research: MEMS BASED SENSOR AND SIGNAL PRE-CONDITIONING CIRCUIT
Area of Research: On-Chip Power Management
Area of Research: Interface Circuits for High Speed Data Link
Area of Research: Signal Acquisition Front-end
Abdul Salam K K
Area of Research: Design Automation of Low Power Analog/Mixed signal circuits
Area of Research: Analog and Mixed-signal design