Additive Cellular Automata Theory and Applications (Volume I) by Chaudhuri P. P., Chowdhury D. R., Nandi S. , Chattopadhyay S. 1-340 (1997)
Compiler Design by Chattopadhyay S. 1-225 (2006)
System Software by Chattopadhyay S. 1-195 (2007)
Compiler Design - Chinese Edition by Chattopadhyay S. 1-196 (2009)
Embedded System Design by Chattopadhyay S. 1-226 (2013)
Network-on-Chip: The Next Generation System-on-Chip Integration by Kundu S., Chattopadhyay S. 1-388 (2014)
Thermal-Aware Testing of Digital VLSI Circuits and Systems by Chattopadhyay S. 1-138 (2018)
Developing Design-for-Security Techniques in Integrated Circuits via Logic Encryption Department of Science and Technology (DST), Govt. of West Bengal
Security Concerns in a Scan Compression Environment for DFTMAX Ultra Synopsys Inc.
Synopsys CAD Laboratory Project Phase II Synopsys Inc.
Area of Research: Network-on-Chip Design
Area of Research: Reconfigurable architecture Design
Area of Research: VLSI testing
Area of Research: Embedded Systems