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Partha Pratim Chakrabarti

	P P Chakrabarti Ph.D.(IIT Kharagpur) Dean, SRIC Dean, Sponsored Research & Industrial Consultancy Professor, Computer Science & Engineering Head, Advanced Technology Development Centre
	P P Chakrabarti joined the Institute in 1988

Contact Addresses

Residence	A-5, IIT Campus, Kharagpur 721302
Phone (office)	+91 - 3222 - 283466
Phone (residence)	+91 - 3222 - 283467 (IIT Phone) +91 - 3222 - 277932 (Private Phone)
email	ppchak @ cse.iitkgp.ernet.in
More Information

Research Areas

Artificial Intelligence
CAD for VLSI & Embedded Systems
Design of Algorithms
Formal Verification

Awards & Honours

Shanti Swarup Bhatnagar Prize (2001)
Swarna Jayanti Award from the Department of Science and Technology. (1999)

Fellow

Fellow : Indian National Academy of Engineers
Fellow : INSA
Fellow : INAE
Fellow : IASc
Fellow : WBS&T
Awarded : INAE
Awarded : IASc
Awarded : WBS&T Academy

Member of Professional Bodies

Senior Member : IEEE

Current Sponsored Projects

Project Title : INAE Visveswarya Chair Professor Project
Principal Investigator : P. P. Chakrabarti
Sponsor : Indian National Academy of Engineering
Project Title : GM Collaborative Research Laboratory on ECS for Education
Principal Investigator : P. P. Chakrabarti, A. Patra
Co-Principal-Investigators : S. Mukhopadhyay, P. Dasgupta, R. Mall, S.K.Ghosh and others
Sponsor : General Motors
Project Title : Advanced VLSI Consortium
Principal Investigator : Pallab Dasgupta
Co-Principal-Investigators : P. P. Chakrabarti
Sponsor : Multiple Industries (Consortium)
Project Title : Leveraging Simulation Dumps and Failure Traces for Formal Property Verfication
Principal Investigator : Pallab Dasgupta
Co-Principal-Investigators : P P Chakrabarti
Sponsor : INTEL Technology India Pvt. Ltd, Bangalore

On-going Consultancy Projects

Project Name : GM Collaborative Research Laboratory on Electronics, Controls and Software: Projects
Client : General Motors
Consultant : P. P. Chakrabarti
Co-consultant(s) : P. Dasgupta, S. Mukhopadhyay, A.Patra, S.K.Ghosh, R. Mall and others
Project Name : Synopsys CAD Laboratory
Client : Synopsys
Consultant : Pallab Dasgupta
Co-consultant(s) : P. P. Chakrabarti
Project Name : IT Implementation and Computerization of DVC
Client : Damodar Valley Corporation
Consultant : P. P. Chakrabarti
Co-consultant(s) : Sujoy Ghose

Patents

METHOD AND APPARATUS FOR EXTRACTING ASSUME PROPERTIES (US Patent) : Filed (Ref : Application no.: 12/144,039 )

Publications: 2009 - 2010

Thermal analysis of multiprocessor SoC applications by simulation and verification by Das, Dipankar, Chakrabarti, P.P., Kumar Rajeev ACM Transactions on Design Automation of Electronic Systems, 15(2), 52 pages (2010)
Scenario-based Timing Verification of Multiprocessor Embedded Applications by Das, Dipankar, Chakrabarti, P.P., Kumar Rajeev ACM Transactions on Design Automation of Electronic Systems, 14(3), 58 pages (2009)
Adaptive parameter control of evolutionary algorithms to improve quality-time trade-off by Aine Sandip, Kumar Rajeev, Chakrabarti, P.P. Applied Soft Computing, 9(2): 527-540 (2009)

Publications: 2008 - 2009

Satisfiability Models for Maximum Transition Power by Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: IEEE Transactions on VLSI Systems, 16(8), 941-951 (2008)
Hybrid Scheduling of Dynamic Task Graphs with Selective Duplication for Multiprocessors under Memory and Time Constraints by Pravanjan Choudhury, Rajeev Kumar, P. P. Chakrabarti IEEE Transactions on Parallel and Distributed Systems, 19(7), 967-980 (2008)
Simulation-based verification using Temporally Attributed Boolean Logic by S. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar ACM Transactions on Design Automation of Electronic Systems, 13(4) (2008)
Auxiliary state machines + context-triggered properties in verification by Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti ACM Transactions on Design Automation of Electronic Systems, 13(4) (2008)
Design intent coverage revisited by Arnab Sinha, Pallab Dasgupta, Bhaskar Pal, Sayantan Das, Prasenjit Basu, P. P. Chakrabarti ACM Transactions on Design Automation of Electronic Systems, 14(1) (2009)

Publications: 2007 - 2008

BUSpec: A Framework for Generation of Verification Aids for Standard Bus Protocol Specifications by B. Pal, A. Banerjee, P. Dasgupta, P.P. Chakrabarti, Integration, the VLSI Journal,, 40, pp 285-304 (2007)
An Evolutionary Algorithm based approach to Automated Design of Analog and RF circuits using Adaptive Normalized Cost Functions by A. Somani, P. P. Chakrabarti, A. Patra, IEEE Transactions on Evolutionary Computing, 11(3), pp 336-353 (2007)
An Automated meta-Level Control Framework for Optimizing the Quality-Time Trade-off of VLSI Algorithms by Aine, Sandip, Chakrabarti, P.P., Kumar Rajeev, IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems, 26(11), pp 1992 (2007)
A Verification System for Transient Response of Analog Circuits by Dastidar, T.R. Chakrabarti, P.P, ACM Transactions on Design Automation of Electronic Systems, 12(3) 39 pages (2007)
Event Propagation for Accurate Circuit Delay Calculation using SAT by Roy Suchismita, Chakrabarti, P.P., Dasgupta, P, ACM Transactions on Design Automation of Electronic Systems, 12(3) 23 pages (2007)
Statistical Static Timing Analysis using Symbolic Event Propogation by Mondal Arijit, Chakrabarti, P.P., Dasgupta Pallab, IET Journal on Computers and Digital Techniques, 1(4), pp 283 â€“ 291 (2007)
Hardware Accelerated Random Test Generation by Pal Bhaskar, Sinha Arnab, Dasgupta Pallab, Chakrabarti, P. P., De Kaushik, IET Journal on Computers and Digital Techniques, 1(4), 423-433 (2007)
Functional Verification of Task Partitioning for Multiprocessor Embedded Systems by Das, Dipankar, Chakrabarti, P.P., Kumar Rajeev, ACM Transactions on Design Automation of Electronic Systems, 12(4), 53 pages (2007)

Publications: 2006 - 2007

An Evolutionary Algorithm based approach to Automated Design of Analog and RF circuits using Adaptive Normalized Cost Functions by A. Somani, P. P. Chakrabarti, A. Patra, IEEE Transactions on Evolutionary Computing, 11(3), pp 336-353 (2007)
BUSpec: A Framework for Generation of Verification Aids for Standard Bus Protocol Specifications by B. Pal, A. Banerjee, P. Dasgupta, P.P. Chakrabarti, Integration, the VLSI Journal, 40, pp 285-304 (2007)
Frame-based Proportional Round Robin by Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar, IEEE Transactions on Computers, 55(9), pp 1121 â€“ 1 (2006)
Reasoning about Timing Behavior of Digital Circuits using Symbolic Event Propagation and Temporal Logic by Arijit Mondal, P. P. Chakrabarti, IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems, 25 (9), pp 1793 â€“ (2006)
Design Intent Coverage â€“ A New Paradigm for Formal Property Verification by Basu, P., Das, S., Banerjee, A., Dasgupta, P., Chakrabarti, P.P., Mohan, C.R., Fix L., Armoni, R, IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems, 25 (10), pp 1922 â€“ (2006)
Moving Sound Reduces Arousal in Psychosomatic Patients by 13. Sajal Bandopadhyay, Manas K Mandal, Partha P Chakrabarti, Sobhendu K Ghatak, Raghabendra Chowdhury, Swagata Ray, International Journal of Neurosciences, 116(8), pp 915 â€“ 9 (2006)

Publications: 2005 - 2006

Post-compilation optimization for multiple gains with pattern matching by Rajeev Kumar, Amit Gupta, BS Pankaj, Mrinmoy Ghosh, and PP Chakrabarti, ACM SIGPLAN Notices, 40 (12): 14 - 23 (2005)
Prediction of Properties of Rubber Using Artificial Neural networks by Vijayabaskar, V., Gupta, R., Chakrabarti, P. P., Bhowmik, Anil. K, Journal of Applied Polymer Science, 100, pp 2227 â€“ 223 (2006)

Publications: 2004 - 2005

A framework for systematic validation and debugging of pipelined simulators by Arnab Roy, S. K. Panda, Rajeev Kumar, P. P. Chakrabarti, ACM Transactions on Design Automation of Electronic Systems, 10(3) (2005) 462-491
A synthesis system for analog circuits based on evolutionary search and topological reuse by T. R. Dastidar, P. P. Chakrabarti, P. Ray, IEEE Trasnsactions on Evolutionary Computation, 9(2) (2005) 211-224
The power of first-order quantification over states in branching and linear time temporal logics by K. Chatterjee, P. Dasgupta, P. P. Chakrabarti, Information Processing Letters, 91 (2004) 201-210

Some Earlier Publications

Genetic algorithms for high-level synthesis in VLSI design by Mandal. C and Chakrabarti. P. P, Materials and Manufacturing Processes, 18(3) (2003) 355-383

Indian Institute of Technology Kharagpur, Kharagpur - 721302, INDIA
Telephone Number +91-3222-255221 | FAX : +91-3222-255303