IITKGP

Indranil Sengupta

Professor

Computer Science and Engineering

+91-3222-283496

isg@iitkgp.ac.in

Research Areas

No Record Found.
  • FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications Yadav D. N., Thangkhiew P. L., Datta K. , Chakraborty S. , Drechsler R. , Sengupta I. By Journal of Electronic Testing - (Accepted/In-Press)
  • A heuristic for linear nearest neighbor realization of quantum circuits by SWAP gate insertion using N-gate lookahead Kole A., Datta K. , Sengupta I. By IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 62-72 (2016)
  • In-field test for permanent faults in FIFO buffers of NoC routers Ghoshal B., Manna K. , Chattopadhyay S. , Sengupta I. By IEEE Transactions on VLSI Systems 24 393-397 (2016)
  • A post-synthesis optimization technique for reversible circuits exploiting negative control lines Datta K., Sengupta I. , Rahaman H. By IEEE Transactions on Computers 64 1208-1214 (2015)
  • Scan chain masking for diagnosis of multiple chain failures in a space compaction environment Kundu S., Chattopadhyay S. , Sengupta I. , Kapur R. By IEEE Transactions on VLSI Systems 23 1185-1195 (2015)
  • An approach to reversible logic synthesis using input and output permutations Datta K., Sengupta I. , Rahaman H. , Drechsler R. By Transactions on Computational Science 24 92-110 (2014)
  • An improved reversible circuit synthesis approach using clustering of ESOP cubes Datta K., Rathi G. , Sengupta I. , Rahaman H. By ACM Journal on Emerging Technologies in Computing (JETC) 11 1-16 (2014)
  • Framework for multiple-fault diagnosis based on multiple fault simulation using particle swarm optimization Kundu S., Jha A. , Chattopadhyay S. , Sengupta I. , Kapur R. By IEEE Transactions on VLSI Systems 22 696-700 (2014)
  • Construction of RSBFs with improved cryptographic properties to resist differential fault attack on grain family of stream ciphers Mazumdar B., Mukhopadhyay D. , Sengupta I. By Cryptography and Communications 7 35-69 (2015)

Principal Investigator

  • RTOS Validation and Development Support Hindustan Aeronautics Limited, MCSRDC Division
  • Synthesis and Verification Targeted to Memristive Crossbars Ministry of Science and Technology, Department of Science and Technology (BIG Data Initiatives Division), Govt. of India

Co-Principal Investigator

  • Machine Learning Approaches for Test and Diagnosis of Digital VLSI Circuits Synopsys Inc.
  • Synopsys CAD Laboratory Project Phase II Synopsys Inc.

Ph. D. Students

Pravanjan Samanta

Area of Research: Logic design using memristors