IITKGP

Research Areas

My research interests are in the areas of Hardware Security, Application of Novel Nano-devices to Hardware Security, VLSI Design and Methodologies and Digital Multimedia Security. I am part of the "Secured Embedded Architecture Laboratory" (SEAL), where we focus on applied security research. For more details about my professional activities and publications, please refer to https://sites.google.com/site/rschakraborty/.

My Google Scholar profile: https://scholar.google.com/citations?user=ITIg9kkAAAAJ&hl=en&oi=ao

My DBLP Profile: https://dblp.org/pid/05/1579.html
  • Multi-level Inline Data Deduplication by R. S. Chakraborty and B. K. Diddi U.S. Patent No. 9,311,323 - (2016)
  • ORACALL: An Oracle-Based Attack on Cellular Automata Guided Logic Locking by Saha A., Banerjee H., Chakraborty R.S., Mukhopadhyay D. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 2445-2454 (2021)
  • Protection of Intellectual Property Cores Through a Design Flow by R. S. Chakraborty, S. Narasimhan and S. Bhunia U.S. patent No. 8,402,401 - (2014)
  • System and Method for Dynamic Partial Reconfiguration of Circuits Mapped or Configured on FPGA Platform (Indian patent No. 417967) by Johnson A., Chakraborty R. S., Mukhopadhyay D. , Irani C. - (2023)
  • Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators by Mukherjee R., Chakraborty R.S. IEEE Embedded Systems Letters 14 131-134 (2022)
  • 3PAA: A Private PUF Protocol for Anonymous Authentication by Chaterjee U., Mukhopadhyay D., Chakraborty R.S. IEEE Transactions on Information Forensics and Security 16 756-769 (2021)
  • A Computationally Efficient Tensor Regression Network based Modeling Attack on XOR Arbiter PUF and its Variants by Santikellur P., Chakraborty R.S. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 1197-1206 (2021)

Principal Investigator

  • AI-Powered Muti-agent QA System for FPGA Designs (FPGA-QA-Agent) Research Centre Imarat (RCI)
  • Research Projects in Engineering and Technology tpo solve RCIs technical challenges in different domains Research Centre Imarat (RCI)
  • Secure and Intelligent Indigenous Network Packet Processor on Field Programmable Gate Array with Hardware based Stateful Firewall for Real-time Intrusion Detection/Prevention Directorate of Futuristic Technology Management (DFTM), Defence Research and Development Organisation, Ministry of Defence

Ph. D. Students

Abhishek Dutta

Area of Research: Machine Learning Applications in Security

Astha Agrawal

Area of Research: VLSI CAD

Shubrojyoti Karmakar

Area of Research: Hardware security

Sivappriya M

Area of Research: Hardware Security

Virendra Kumar Gautam

Area of Research: Cryptography

MS Students

Anurag Dutta

Area of Research: Artificial Intelligence and Machine Learning

Pallavi Anand

Area of Research: Machine Learning aided Hardware Security

Sumitava Biswas

Area of Research: Blockchain Security