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Computer Science and Engineering
Faculty
Rajat Subhra Chakraborty
Professor
Computer Science and Engineering
+91-3222-281792
Responsibilities
- Associate Dean, Faculty of Engineering and Architecture (FoE&A)
Research Areas
- Hardware Security
- Digital Content Protection
- Digital Image Forensics
- VLSI and Embedded Systems
My Google Scholar profile: https://scholar.google.com/citations?user=ITIg9kkAAAAJ&hl=en&oi=ao
My DBLP Profile: https://dblp.org/pid/05/1579.html
- Multi-level Inline Data Deduplication R. S. Chakraborty and B. K. Diddi By U.S. Patent No. 9,311,323 - (2016)
- ORACALL: An Oracle-Based Attack on Cellular Automata Guided Logic Locking Saha A., Banerjee H., Chakraborty R.S., Mukhopadhyay D. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 2445-2454 (2021)
- Protection of Intellectual Property Cores Through a Design Flow R. S. Chakraborty, S. Narasimhan and S. Bhunia By U.S. patent No. 8,402,401 - (2014)
- System and Method for Dynamic Partial Reconfiguration of Circuits Mapped or Configured on FPGA Platform (Indian patent No. 417967) Johnson A., Chakraborty R. S., Mukhopadhyay D. , Irani C. By - (2023)
- A Method and System for Evaluation of Reversible Watermarking of Digital Images and Audio (Indian Patent. No. 405072) Naskar R., Sarkar B. , Chakraborty R. S. By - (2022)
- Attacks on Recent DNN IP Protection Techniques and Their Mitigation Mukherjee R., Chakraborty R. S. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - (Accepted/In-Press)
- Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators Mukherjee R., Chakraborty R.S. By IEEE Embedded Systems Letters 14 131-134 (2022)
- 3PAA: A Private PUF Protocol for Anonymous Authentication Chaterjee U., Mukhopadhyay D., Chakraborty R.S. By IEEE Transactions on Information Forensics and Security 16 756-769 (2021)
- A Computationally Efficient Tensor Regression Network based Modeling Attack on XOR Arbiter PUF and its Variants Santikellur P., Chakraborty R.S. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 1197-1206 (2021)
Principal Investigator
- Digital Image Forensics in the Context of a Connected India Algorithms and Implementation Department of Science and Technology (DST)
- Security Course Development for Intel (R) Unnati Program INTEL TECHNOLOGY INDIA PRIVATE LIMITED
Co-Principal Investigator
- Cyber Security of Power Systems through Design-for Prevention, Real-time Detection and Effective Intervention Central Power Research Institute
- Secure Resource-Constrained Communication Framework for Tactical Networks Using Physically Unclonable Functions (SeRFPUF) Directorate of Futuristic Technology Management (DFTM), Defence Research and Development Organisation, Ministry of Defence
Ph. D. Students
Akashdeep Saha
Area of Research: Hardware Security
B V Sreekanth
Area of Research: Hardware Security Issues in Network Security
Kuheli Pratihar
Area of Research: Hardware Security
Rijoy Mukherjee
Area of Research: Hardware Security
Sivappriya M
Area of Research: Hardware Security
Souvik Sonar
Area of Research: Cryptography
MS Students
Pallavi Anand
Area of Research: Machine Learning aided Hardware Security
Sneha Swaroopa
Area of Research: Hardware Security
Sumitava Biswas
Area of Research: Blockchain Security
Awards and Accolades
- Outstanding Faculty Award
- IEI Young Engineers Award
- IBM Faculty Award
- RECI Award (RAE, U.K.)
- IBM SUR Award
Research Preview
All Publications
- Book
- Deep Learning for Computational Problems in Hardware Security: Modelling Attacks on Strong Physically Unclonable Function Circuits Santikellur P., Chakraborty R. S. By - (2023)
- Digital Image Forensics - Theory and Implementation Roy A., Dixit R. , Naskar R. , Chakraborty R. S. By - (2019)
- High Performance Integer Arithmetic Circuit Design on FPGA: Architecture, Implementation and Design Automation Palchaudhuri A., Chakraborty R. S. By - (2016)
- Hardware Security: Design, Threats and Safeguards Mukhopadhyay D., Chakraborty R. S. By Hardware Security: Design, Threats and Safeguards - (2014)
- Reversible Digital Watermarking: Theory and Practices Naskar R., Chakraborty R. S. By Reversible Digital Watermarking: Theory and Practices - (2014)
- Book Chapter/Section
- Hardware IP Protection Using Register Transfer Level Locking and Obfuscation of Control and Data Flow Santikellur P., Chakraborty R. S., Bhunia S. By Behavioral Synthesis for Hardware Security 57-69 (2022)
- Online checkers to detect hardware trojans in AES hardware accelerators Rajendran S.R., Chakraborty R.S. By VLSI and Hardware Implementations using Modern Machine Learning Methods 41-52 (2022)
- Hardware Security in the Context of Internet of Things: Challenges and Opportunities Santikellur P., Chakraborty R. S., Mathew J. By Internet of Things and Secure Smart Environments: Success and Pitfalls 299-362 (2020)
- Fault-Tolerant Implementations of Physically Unclonable Functions on FPGA Sahoo D. P., Bag A. , Patranabis S. , Mukhopadhyay D. , Chakraborty R. S. By Security and Fault Tolerance in Internet of Things 129-153 (2018)
- Logic Testing for Hardware Trojan Detection Govindan V., Chakraborty R. S. By The Hardware Trojan War: Attacks, Myths, and Defenses - (2017)
- State Space Obfuscation and its Applications in Hardware Security Chakraborty R. S., Bhunia S. By Hardware Protection through Obfuscation - (2017)
- A Fabric Component based Approach to the Architecture and Design Automation of High Performance Integer Arithmetic Circuits on FPGA Palchaudhuri A., Chakraborty R. S. By Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design - (2015)
- RTL IP Protection and Secure SoC Design: a Design Obfuscation based Approach Chakraborty R. S., Bhunia S. , Zheng Y. By Secure System Design and Trustable Computing - (2015)
- Reversible Watermarking: Theory and Practice Naskar R., Chakraborty R. S. By Case Studies in Secure Computing Achievements and Trends - (2014)
- Journal
- Attacks on Recent DNN IP Protection Techniques and Their Mitigation Mukherjee R., Chakraborty R. S. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - (Accepted/In-Press)
- An image forensic technique based on JPEG ghosts Singh D., Singh P., Jena R., Chakraborty R.S. By Multimedia Tools and Applications 82 14153-14169 (2023)
- A shared page-aware machine learning assisted method for predicting and improving multi-level cell NAND flash memory life expectancy Santikellur P., Buddhanoy M., Sakib S., Ray B., Chakraborty R.S. By Microelectronics Reliability 140 114867-114865 (2023)
- Image splicing detection with principal component analysis generated low-dimensional homogeneous feature set based on local binary pattern and support vector machine Das D., Naskar R., Chakraborty R.S. By Multimedia Tools and Applications 82 25847-25864 (2023)
- Birds of the Same Feather Flock Together: A Dual-Mode Circuit Candidate for Strong PUF-TRNG Functionalities Pratihar K., Chatterjee U. , Alam M. , Chakraborty R. S., Mukhopadhyay D. By IEEE Transactions on Computers 72 1636-1651 (2023)
- Implementation, Characterization and Application of Path Changing Switch based Arbiter PUF on FPGA as a lightweight Security Primitive for IoT Mahalat M.H., Mandal S., Mondal A., Sen B., Chakraborty R.S. By ACM Transactions on Design Automation of Electronic Systems 27 1-26 (2022)
- A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention Mukherjee R., Rajendran S.R., Chakraborty R.S. By Journal of Cryptographic Engineering 12 495-522 (2022)
- Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators Mukherjee R., Chakraborty R.S. By IEEE Embedded Systems Letters 14 131-134 (2022)
- Correlation Integral based Intrinsic Dimension: a Deep Learning Assisted Empirical Metric to Estimate the Robustness of Physically Unclonable Functions to Modeling Attacks Santikellur P., Chakraborty R.S. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - (2021)
- Binary decision diagram-based synthesis technique for improved mapping of Boolean functions inside memristive crossbar-slices Chakraborty A., Maurya V., Prasad S., Gupta S., Chakraborty R.S., Rahaman H. By IET Computers and Digital Techniques 15 112-124 (2021)
- ORACALL: An Oracle-Based Attack on Cellular Automata Guided Logic Locking Saha A., Banerjee H., Chakraborty R.S., Mukhopadhyay D. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 2445-2454 (2021)
- 3PAA: A Private PUF Protocol for Anonymous Authentication Chaterjee U., Mukhopadhyay D., Chakraborty R.S. By IEEE Transactions on Information Forensics and Security 16 756-769 (2021)
- A Computationally Efficient Tensor Regression Network based Modeling Attack on XOR Arbiter PUF and its Variants Santikellur P., Chakraborty R.S. By IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 1197-1206 (2021)
- A Conditionally Chaotic Physically Unclonable Function Design Framework with High Reliability Chattopadhyay S., Santikellur P. , Chakraborty R. S., Mathew J. , Ottavi M. By ACM Transactions on Design Automation of Electronic Systems 26 1-24 (2021)
- Machine Learning Assisted PUF Calibration for Trustworthy Proof of Sensor Data in IoT Chatterjee U., Chatterjee S., Mukhopadhyay D., Chakraborty R.S. By ACM Transactions on Design Automation of Electronic Systems 25 1-32 (2020)
- Probabilistic Hardware Trojan Attacks on Multiple Levels of Reconfigurable Network Infrastructure Mukherjee R., Govindan V. , Koteshwara S. , Das A. , Parhi K. K., Chakraborty R. S. By Journal of Hardware and Systems Security 4 343-360 (2020)
- Hardware Obfuscation and Logic Locking: A Tutorial Introduction Hoque T., Chakraborty R.S., Bhunia S. By IEEE Design and Test 37 59-77 (2020)
- Toward Optimal Prediction Error Expansion-Based Reversible Image Watermarking Roy A., Chakraborty R.S. By IEEE Transactions on Circuits and Systems for Video Technology 30 2377-2390 (2020)
- HTRNG: High Throughput True Random Number Generator using Memristor Rai V. K., Tripathy S. , Chakraborty R. S., Mathew J. By IEEE VLSI Circuits & Systems Letter 6 1-12 (2020)
- Recycled and Remarked Counterfeit Integrated Circuit Detection by Image-Processing-Based Package Texture and Indent Analysis Ghosh P., Chakraborty R.S. By IEEE Transactions on Industrial Informatics 15 1966-1974 (2019)
- Automated Defective Pin Detection for Recycled Microelectronics Identification Ghosh P., Bhattacharyay A. , Forte D. , Chakraborty R. S. By Journal of Hardware and Systems Security 3 250-260 (2019)
- Building PUF Based Authentication and Key Exchange Protocol for IoT Without Explicit CRPs in Verifier Database Chatterjee U., Govindan V., Sadhukhan R., Mukhopadhyay D., Chakraborty R.S., Mahata D., Prabhu M.M. By IEEE Transactions on Dependable and Secure Computing 16 424-437 (2019)
- A Robust Residual Dense Neural Network for Countering Antiforensic Attack on Median Filtered Images Tariang D.B., Chakraborty R.S., Naskar R. By IEEE Signal Processing Letters 26 1132-1136 (2019)
- A Hardware Trojan Attack on FPGA based Cryptographic Key Generation: Impact and Detection Govindan V., Chakraborty R. S., Santikellur P. , Chaudhary A. K. By Journal of Hardware and Systems Security 2 225-239 (2018)
- A Multiplexer-Based Arbiter PUF Composition with Enhanced Reliability and Security Sahoo D.P., Mukhopadhyay D., Chakraborty R.S., Nguyen P.H. By IEEE Transactions on Computers 67 403-417 (2018)
- Customized Instructions for Protection Against Memory Integrity Attacks Basu Roy D., Alam M., Bhattacharya S., Govindan V., Regazzoni F., Chakraborty R.S., Mukhopadhyay D. By IEEE Embedded Systems Letters 10 91-94 (2018)
- An Improved DCM-based Tunable True Random Number Generator for Xilinx FPGA Johnson A. P., Chakraborty R. S., Mukhopadhyay D. By IEEE Transactions on Circuits and Systems-II 64 452-456 (2017)
- A PUF based Secure Communication Protocol for IoT Chatterjee U., Chakraborty R. S., Mukhopadhyay D. By ACM Transactions on Embedded Computing Systems 16 1-25 (2017)
- Remote Dynamic Partial Reconfiguration: A Threat to Internet-of-Things and Embedded Security Applications Johnson A. P., Patranabis S. , Chakraborty R. S., Mukhopadhyay D. By Microprocessors and Microsystems 52 131-144 (2017)
- Security Analysis of Arbiter PUF and its Lightweight Compositions under Predictability Tests Nguyen P. H., Sahoo D. P., Chakraborty R. S., Mukhopadhyay D. By ACM Transactions on Design Automation of Electronic Systems 22 1-28 (2017)
- A Flexible Online Checking Technique to Enhance Hardware Trojan Horse Detectability by Reliability Analysis Chakraborty R. S., Pagliarini S. , Mathew J. , R. S. R., M. N. D. By IEEE Transaction on Emerging Topics in Computing 5 260-270 (2017)
- Binary Decision Diagram Assisted Modeling of FPGA-based Physically Unclonable Function by Genetic Programming Chakraborty R. S., Jeldi R. R., Saha I. , Mathew J. By IEEE Transactions on Computers 66 971-981 (2017)
- Low Cost Memristor Associative Memory Design for Full and Partial Matching Applications Yang Y., Mathew J. , Chakraborty R. S., Ottavi M. , Pradhan D. K. By IEEE Transactions on Nanotechnology 15 527-538 (2016)
- Theory and Application of Delay Constraints in Arbiter PUF Chatterjee U., Chakraborty R. S., Mukhopadhyay D. By ACM Transactions on Embedded Computing Systems 15 10:1-10:20 (2016)
- A Technique to Evaluate Upper Bounds on Performance of Pixel-Prediction based Reversible Watermarking Algorithms Naskar R., Chakraborty R. S. By Journal of Signal Processing Systems 82 373-389 (2016)
- A Novel Memristor based Hardware Security Primitive Mathew J., Chakraborty R. S., Yang Y. , Sahoo D. P., Pradhan D. K. By ACM Transactions on Embedded Computing Systems 14 1-20 (2015)
- A Novel Memristor based Physically Unclonable Function Mathew J., Chakraborty R. S., Yang Y. , Sahoo D. P., Pradhan D. K. By Integration, the VLSI Journal 51 37-45 (2015)
- A PUF-enabled Secure Architecture for FPGA-based IoT Applications Johnson A. P., Chakraborty R. S., Mukhopadhyay D. By IEEE Transactions on Multi-scale Computing Systems 1 110-122 (2015)
- A Case of Lightweight PUF Constructions: Cryptanalysis and Machine Learning Attacks Sahoo D. P., Nguyen P. H., Mukhopadhyay D. , Chakraborty R. S. By IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems 34 1334-1343 (2015)
- Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis S. Narasimhan, D. Du, R. S. Chakraborty, S. Paul, F. Wolff, C. Papachristou, K. Roy and S. Bhunia By IEEE Transactions on Computers 62 2183-2195 (2013)
- Hardware Trojan Insertion by Direct Modification of FPGA Configuration Bitstream Chakraborty R. S., Saha I. , Palchaudhuri A. , Naik G. K. By IEEE Design & Test of Computers 30 45-54 (2013)
- A Generalized Tamper Localization Approach for Reversible Watermarking Algorithms R. Naskar and R. S. Chakraborty By ACM Transactions on Multimedia Computing Communications and Applications 9 19:1-19:22 (2013)
- Histogram Bin Shifting based Reversible Watermarking for Color Images Naskar R., Chakraborty R. S. By IET Image Processing 7 99-110 (2013)
- Partial Bitstream Protection for Low-cost FPGAs with PUFs, Obfuscation & DPSR-LD Goren S., Ozkurt O. , Ugurdag H. F., Chakraborty R. S., Mukhopadhyay D. By Computers and Electrical Engineering 39 386-397 (2013)
- Hardware IP Protection During Evaluation using Embedded Sequential Trojan Narasimhan S., Chakraborty R. S., Bhunia S. By IEEE Design & Test of Computers 29 70-79 (2012)
- Performance of Reversible Digital Image Watermarking under Error-prone Data Communication: a Simulation-based Study Naskar R., Chakraborty R. S. By IET Image Processing 6 728-737 (2012)
- Reversible Watermarking Utilizing Weighted Median-based Prediction Naskar R., Chakraborty R. S. By IET Image Processing 6 507-520 (2012)
- Security Against Hardware Trojan Attacks Using Key-based Design Obfuscation Chakraborty R. S., Bhunia S. By Journal of Electronic Testing:Theory and Applications 27 767-785 (2011)
- HARPOON: A SoC Design Methodology for Hardware Protection through Netlist Level Obfuscation Chakraborty R. S., Bhunia S. By IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems 28 1493-1502 (2009)
- A Study of Asynchronous Design Methodology for Robust CMOS-Nano Hybrid System Design Chakraborty R. S., Bhunia S. By ACM Journal of Emerging Technologies in Computing Systems 5 1-22 (2009)
- Low-Power Hybrid CMOS-NEMS FPGA: Circuit Level Analysis and Defect-Aware Mapping Chakraborty R. S., Paul S. , Zhou Y. , Bhunia S. By IET Computers and Digital Techniques 3 609-624 (2009)
- Hybridization of CMOS with CNT-Based Nano Electromechanical Switch for Low Leakage and Robust Circuit Design Using Nanoscaled CMOS Devices Chakraborty R. S., Narasimhan S. , Bhunia S. By IEEE Transactions on Circuits and Systems-I 54 2480-2488 (2007)
- Patent
- System and Method for Dynamic Partial Reconfiguration of Circuits Mapped or Configured on FPGA Platform (Indian patent No. 417967) Johnson A., Chakraborty R. S., Mukhopadhyay D. , Irani C. By - (2023)
- System for Logic Circuit Obfuscation and Method Thereof Mukhopadhyay D., Chakraborty R. S., Saha A. , Das S. By - (2023)
- A Method and System for Evaluation of Reversible Watermarking of Digital Images and Audio (Indian Patent. No. 405072) Naskar R., Sarkar B. , Chakraborty R. S. By - (2022)
- A Multiplexer based System for Electronic Device Authentication and Preventing Counterfeiting of the Electronic Device Sahoo D. P., Mukhopadhyay D. , Nguyen P. H., Chakraborty R. S. By - (2017)
- Multi-level Inline Data Deduplication R. S. Chakraborty and B. K. Diddi By U.S. Patent No. 9,311,323 - (2016)
- Protection of Intellectual Property Cores Through a Design Flow R. S. Chakraborty, S. Narasimhan and S. Bhunia By U.S. patent No. 8,402,401 - (2014)
- Conferences
- Automated Detection and Localization of Counterfeit Chip Defects by Texture Analysis in Infrared (IR) Domain Ghosh P., Botero U. J., Ganji F. , Woodard D. L., Chakraborty R. S., Forte D. By IEEE International Conference on PHYSICAL ASSURANCE and INSPECTION of ELECTRONICS (PAINE) - (Accepted/In-Press)
- DIP Learning on CAS-Lock: Using Distinguishing Input Patterns for Attacking Logic Locking Saha A., Chatterjee U., Mukhopadhyay D., Chakraborty R.S. By Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022 688-693 (2022)
- Design and Analysis of Logic Locking Techniques Saha A., Mukhopadhyay D., Chakraborty R.S. By IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2021-October - (2021)
- APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network Santikellur P., Mukherjee R., Chakraborty R.S. By Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI 89-94 (2021)
- Automated Detection and Localization of Counterfeit Chip Defects by Texture Analysis in Infrared (IR) Domain Ghosh P., Botero U.J., Ganji F., Woodard D., Chakraborty R.S., Forte D. By Proceedings of the 2020 IEEE International Conference on Physical Assurance and Inspection on Electronics, PAINE 2020 - (2020)
- SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection Rajendran S.R., Mukherjee R., Chakraborty R.S. By ASHES 2020 - Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware Security 103-116 (2020)
- Malware Classification through Attention Residual Network based Visualization Tariang D.B., Birudaraju S.C., Naskar R., Khare V., Chakraborty R.S. By Proceedings of the 2020 Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2020 - (2020)
- Stupify: A Hardware Countermeasure of KRACKs in WPA2 using Physically Unclonable Functions Chatterjee U., Sadhukhan R. , Mukhopadhyay D. , Chakraborty R. S., Mahata D. , Prabhu M. By The WEB Conference 217-221 (2020)
- Automated Framework for Unsupervised Counterfeit Integrated Circuit Detection by Physical Inspection Ghosh P., Ganji F. , Forte D. , Woodard D. L., Chakraborty R. S. By IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE) - (2019)
- Optimized Multi-Layer Hierarchical Network Intrusion Detection System with Genetic Algorithms Santikellur P., Haque T., Al-Zewairi M., Chakraborty R.S. By 2019 2nd International Conference on New Trends in Computing Sciences, ICTCS 2019 - Proceedings - (2019)
- A Computationally Efficient Tensor Regression Network based Modeling Attack on XOR APUF Santikellur P., Lakshya, Prakash S.R., Chakraborty R.S. By 2019 Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2019 - (2019)
- Machine Learning Assisted Accurate Estimation of Usage Duration and Manufacturer for Recycled and Counterfeit Flash Memory Detection Chattopadhyay S., Kumari P., Ray B., Chakraborty R.S. By Proceedings of the Asian Test Symposium 2019-December 49-54 (2019)
- ProTro: A Probabilistic Counter based Hardware Trojan Attack on FPGA based MACSec enabled Ethernet Switch Govindan V., Koteshwara S. , Das A. , Parhi K. K., Chakraborty R. S. By International Conference on Security, Privacy and Applied Cryptographic Engineering (SPACE) - (2019)
- Cyclic beneš network based logic encryption for mitigating SAT-based attacks Chattopadhyay S., Chakraborty R.S. By Proceedings - 2019 IEEE International Conference on Computer Design, ICCD 2019 567-575 (2019)
- Cyclic Bene Network based Logic Encryption for Mitigating SAT-Based Attacks Chattopadhyay S., Chakraborty R. S. By IEEE International Conference on Computer Design (ICCD) - (2019)
- PUFSSL: An OpenSSL Extension for PUF based Authentication Chatterjee U., Sadhukhan R., Govindan V., Mukhopadhyay D., Chakraborty R.S., Pati S., Mahata D., Prabhu M.M. By International Conference on Digital Signal Processing, DSP 2018-November - (2019)
- United we stand: A threshold signature scheme for identifying outliers in PLCs Chatterjee U., Santikellur P., Sadhukhan R., Govindan V., Mukhopadhyay D., Chakraborty R.S. By Proceedings - Design Automation Conference - (2019)
- United We Stand: A Threshold Signature Scheme for Identifying Outliers in PLCs (short-paper) Chatterjee U., Santikellur P. , Sadhukhan R. , Govindan V. , Mukhopadhyay D. , Chakraborty R. S. By Design Automation Conference 1-2 (2019)
- Revisiting the Security of LPN based RFID Authentication Protocol and Potential Exploits in Hardware Implementations Bagadia K., Chatterjee U. , Roy D. B., Mukhopadhyay D. , Chakraborty R. S. By International Conference on Security, Privacy and Applied Cryptographic Engineering (SPACE) 214-230 (2019)
- Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF Balijabudda V.S., Thapar D., Santikellur P., Chakraborty R.S., Chakrabarti I. By 2019 Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2019 - (2019)
- Copy move forgery detection with similar but genuine objects Roy A., Konda A., Chakraborty R.S. By Proceedings - International Conference on Image Processing, ICIP 2017-September 4083-4087 (2018)
- Trustworthy proofs for sensor data using FPGA based physically unclonable functions Chatterjee U., Sahoo D.P., Mukhopadhyay D., Chakraborty R.S. By Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 2018-January 1504-1507 (2018)
- PUFSSL: An OpenSSL Extension for PUF based Authentication Chatterjee U., Sadhukhan R. , Govindan V. , Mukhopadhyay D. , Chakraborty R. S., Pati S. , Mahata D. , Prabhu M. M. By IEEE International Conference on Digital Signal Processing (DSP 2018) 1-5 (2018)
- Trustworthy Proofs for Sensor Data using FPGA based Physically Unclonable Functions Chatterjee U., Sahoo D. P., Mukhopadhyay D. , Chakraborty R. S. By Design, Automation and Test in Europe (DATE) 1504-1507 (2018)
- DFARPA: Di erential fault attack resistant physical design automation. Khairallah M., Sadhukhan R. , Samanta R. , Breier J. , Bhasin S. , Chattopadhyay A. , Chakraborty R. S., Mukhopadhyay D. By DATE 2018 1171-1172 (2018)
- DFARPA: Differential fault attack resistant physical design automation Khairallah M., Sadhukhan R., Samanta R., Breier J., Bhasin S., Chakraborty R.S., Chattopadhyay A., Mukhopadhyay D. By Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 2018-January 1171-1174 (2018)
- Differential Fault Attack Resistant Physical Design Automation Khairallah M., Sadhukhan R. , Samanta R. , Breier J. , Bhasin S. , Chakraborty R. S., Chattopadhyay A. , Mukhopadhyay D. By Design, Automation and Test in Europe (DATE) - (2018)
- Discrete cosine transform residual feature based filtering forgery and splicing detection in JPEG images Roy A., Tariang D.B., Chakraborty R.S., Naskar R. By IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops 2018-June 1633-1641 (2018)
- Copy Move Forgery Detection with Similar but Genuine Objects Roy A., Konda A. , Chakraborty R. S. By IEEE International Conference on Image Processing (ICIP) 4083-4087 (2017)
- Counterfeit IC Detection By Image Texture Analysis Ghosh P., Chakraborty R. S. By Euromicro Conference on Digital System Design (DSD) 283-286 (2017)
- Side Channel Evaluation of PUF-Based Pseudorandom Permutation Sahoo D. P., Nguyen P. H., Roy D. B., Mukhopadhyay D. , Chakraborty R. S. By Euromicro Conference on Digital System Design (DSD) 237-243 (2017)
- Automated JPEG forgery detection with correlation based localization Tariang D. B., Roy A. , Chakraborty R. S., Naskar R. By IEEE International Conference on Multimedia Expo Workshops (ICMEW) 226-231 (2017)
- Camera Source Identification Using Discrete Cosine Transform Residue Features and Ensemble Classifier Roy A., Chakraborty R. S., Sameer U. , Naskar R. By IEEE Conference on Computer Vision and Pattern Recognition Workshops (CVPRW) 1848-1854 (2017)
- Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications Johnson A. P., Patranabis S. , Chakraborty R. S., Mukhopadhyay D. By EUROMICRO Digital System Design Conference (DSD) - (2016)
- SmashClean: A Hardware level mitigation to stack smashing attacks in OpenRISC Alam M., Basu Roy D. , Bhattacharya S. , Govindan V. , Chakraborty R. S., Mukhopadhyay D. By ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) - (2016)
- Memristor based Arbiter PUF: Cryptanalysis Threat and its Mitigation Chatterjee U., Chakraborty R. S., Mathew J. , Pradhan D. K. By International Conference on VLSI Design (VLSID) - (2016)
- Testability based Metric for Hardware Trojan Vulnerability Assessment Saha S., Chakraborty R. S., Mukhopadhyay D. By EUROMICRO Digital System Design Conference (DSD) - (2016)
- Testability based Metric for Hardware Trojan Vulnerability Assessment, Saha S., Chakraborty R. S., Mukhopadhyay D. By 19th Euromicro Conference on Digital Systems Design (DSD) 2016 - (2016)
- Automated Design of High Performance Integer Arithmetic Cores on FPGA Palchaudhuri A., Chakraborty R. S. By EUROMICRO Digital System Design Conference (DSD) - (2015)
- Cryptanalysis of Robust Ring Oscillator PUF with Enhanced Challenge-Response Set Nguyen P. H., Sahoo D. P., Chakraborty R. S., Mukhopadhyay D. By Design, Automation and Test in Europe (DATE) - (2015)
- Towards Ideal Arbiter PUF Design on Xilinx FPGA: a Practitioner's Perspective Sahoo D. P., Chakraborty R. S., Mukhopadhyay D. By EUROMICRO Digital System Design Conference (DSD) - (2015)
- Composite PUF: A new design paradigm for Physically Unclonable Functions on FPGA. Sahoo D., Saha S. , Mukhopadhyay D. , Chakraborty R. S., Kapoor H. By HOST 2014 - (2014)
- Fault attack on AES via hardware Trojan insertion by dynamic partial recon guration of FPGA over ethernet Johnson A., Saha S. , Chakraborty R. S., Mukhopadhyay D. By WESS 2014 - (2014)
- Highly Compact Automated Implementation of Linear CA on FPGAs Palchaudhuri A., Chakraborty R. S., Salman M. , Kardas S. , Mukhopadhyay D. By ACRI 2014 388-397 (2014)
- Design of Low Area-overhead Ring Oscillator PUF with Large Challenge Space Sahoo D. P., Mukhopadhyay D. , Chakraborty R. S. By International Conference on Reconfigurable Computing and FPGAs (ReConFig) - (2013)
- E ect of Malicious Hardware Logic on Circuit Reliability Burman S., Palchaudhuri A. , Chakraborty R. S., Mukhopadhyay D. By VDAT 2012 - (2012)
- Multi-level Attack: an Emerging Threat Model for Cryptographic Hardware Ali S. S., Mukhopadhyay D. , Chakraborty R. S., Bhunia S. By Design, Automation and Test in Europe (DATE) - (2011)
- Multilevel Attack: an Emerging Threat Model for Cryptographic Hardware Ali S., Chakraborty R. S., Mukhopadhyay D. , Bhunia S. By DATE (Design, Automation and Test in Europe) - (2011)
- RTL Hardware IP Protection Using Key-Based Control and Data Flow Obfuscation Chakraborty R. S., Bhunia S. By International Conference on VLSI Design (VLSID) - (2010)
- Security Against Hardware Trojan Through a Novel Application of Design Obfuscation Chakraborty R. S., Bhunia S. By IEEE/ACM International Conference on Computer-aided Design (ICCAD) - (2009)
- Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits Chakraborty R. S., Paul S. , Bhunia S. By International Conference on VLSI Design (VLSID) - (2008)
- Hardware Protection and Authentication Through Netlist-level Obfuscation Chakraborty R. S., Bhunia S. By International Conference on Computer-aided Design (ICCAD) - (2008)
- Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme Wolff F. G., Bhunia S. , Papachristou C. , Chakraborty R. S. By Design, Automation and Test in Europe (DATE) - (2008)
- Workshop
- SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection Rajendran S. R., Mukherjee R. , Chakraborty R. S. By ACM International Workshop on Attacks and Solutions in Hardware Security - (Accepted/In-Press)
- Classification of Computer Generated and Natural Images based on Efficient Deep Convolutional Recurrent Attention Model Tariang D. B., Chakraborty R. S., Naskar R. , Roy A. , Sengupta P. By Computer Vision and Pattern Recognition Workshops (CVPRW) - (2019)
- Discrete Cosine Transform Residual Feature based Filtering Forgery and Splicing Detection in JPEG Images Roy A., Tariang D. B., Chakraborty R. S., Naskar R. By Computer Vision and Pattern Recognition Workshops (CVPRW) - (2018)
- Optimal Distortion Estimation For Prediction Error Expansion Based Reversible Watermarking Roy A., Chakraborty R. S. By International Workshop on Digital-forensics and Watermarking (IWDW) - (2016)
- Fault Tolerant Implementations of Delay-based Physically Unclonable Functions on FPGA Sahoo D. P., Patranabis S. , Mukhopadhyay D. , Chakraborty R. S. By Fault Diagnosis and Tolerance in Cryptography (FDTC) - (2016)
- Improved Test Pattern Generation for Hardware Trojan Detection using Genetic Algorithm and Boolean Satisfiability Saha S., Chakraborty R. S., Nuthakki S. S., Rohilla A. , Mukhopadhyay D. By Workshop on Cryptographic Hardware and Embedded Systems (CHES) - (2015)
- A Novel Attack on a FPGA based True random Number Generator Johnson A. P., Chakraborty R. S., Mukhopadhyay D. By Workshop on Embedded Systems Security (WESS, part of ACM ESWEEK) - (2015)
- Fault Attack on AES via Hardware Trojan Insertion by Dynamic Partial Reconfiguration of FPGA over Ethernet Johnson A. P., Saha S. , Chakraborty R. S., Mukhopadhyay D. , Goren S. By Workshop on Embedded Systems Security (WESS, part of ACM ESWEEK) - (2014)
- Self-referencing: a Scalable Side-channel Approach for Hardware Trojan Detection Du D., Narasimhan S. , Chakraborty R. S., Bhunia S. By Workshop on Cryptographic Hardware and Embedded Systems (CHES) - (2010)
- Hardware Trojan: Threats and Emerging Solutions (invited paper) Chakraborty R. S., Narasimhan S. , Bhunia S. By IEEE International. High Level Design Validation and Test Workshop (HLDVT) - (2009)
- MERO: A Statistical Approach for Hardware Trojan Detection Using Logic Testing Chakraborty R. S., Wolff F. , Paul S. , Papachristou C. , Bhunia S. By Workshop on Cryptographic Hardware and Embedded Systems (CHES) - (2009)
- Security Through Obscurity: An Approach for Protecting Register Transfer Level Hardware IP Chakraborty R. S., Bhunia S. By IEEE International Workshop on Hardware Oriented Security and Trust (HOST) - (2009)
- On-Demand Transparency for Improving Hardware Trojan Detectability Chakraborty R. S., Paul S. , Bhunia S. By IEEE International Workshop on Hardware-Oriented Security and Trust (HOST) - (2008)
- Symposium
- Machine Learning Assisted Accurate Estimation of Usage Duration and Manufacturer for Recycled and Counterfeit Flash Memory Detection Chattopadhyay S., Kumari P. , Ray B. , Chakraborty R. S. By IEEE Asian Test Symposium (ATS) - (2019)
- Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF Balijabudda V. S., Thapar D. , Santikellur P. , Chakraborty R. S., Chakrabarti I. By IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST) - (2019)
- Automated Detection of Pin Defects on Counterfeit Microelectronics Ghosh P., Forte D. , Woodard D. L., Chakraborty R. S. By International Symposium for Testing and Failure Analysis (ISTFA) - (2018)
- Composite PUF: A New Design Paradigm for Physically Unclonable Functions on FPGA Sahoo D. P., Saha S. , Mukhopadhyay D. , Chakraborty R. S., Kapoor H. By IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) - (2014)
- Lossless Secret Image Sharing based on Generalized LSB Replacement Naskar R., Chakraborty R. S. By ACM Research in Applied Computation Symposium (RACS) - (2012)
- TeSR: A Robust Temporal Self-Referencing Approach for Hardware Trojan Detection Narasimhan S., Wang X. , Du D. , Chakraborty R. S., Bhunia S. By IEEE International Symposium on Hardware Oriented Security and Trust (HOST) - (2011)
- Testability of Cryptographic Hardware and Detection of Hardware Trojans Mukhopadhyay D., Chakraborty R. S. By IEEE Asian Test Symposium (ATS) - (2011)
- Multiple-parameter Side-channel Analysis: a Non-invasive Hardware Trojan Detection Approach Narasimhan S., Du D. , Chakraborty R. S., Paul S. , Wolff F. , Papachristou C. , Roy K. , Bhunia S. By IEEE International Symposium on Security and Trust (HOST) - (2010)
- VIm-Scan: A Low Overhead Scan Design Approach for Protection of Secret Key in Scan-Based Secure Chips Paul S., Chakraborty R. S., Bhunia S. By IEEE VLSI Test Symposium (VTS) - (2007)
- Defect-Aware Configurable Computing in Nano-crossbar Fabric for Improved Yield Paul S., Chakraborty R. S., Bhunia S. By IEEE International On-Line Testing Symposium (IOLTS) - (2007)
Completed Projects
Principal Investigator
- STUDY OF HADWARE MALWARE VUNERABILITIES & MITIGATION TECHNOLIQUES FOR FPGAS CARS
- HARDWARE SECURITY: ENSURING TRUST IN INTEGRATED CIRCUITS SRIC, IIT KHARAGPUR
- Machine learning based model building attacks on PUFs CAIR, CENTRE FOR ARTIFICIAL INTELLIGENCE AND ROBOTICS
- Hardware Trojan attack Test bed on FPGA based systems Cyrus Irani
- High performance reversible watermarking of digital images: Theory, implementation and impact on medical imaging Science and Engineering Research Board (SERB)
- Optimize real time encryption performance for high volume storage data traffic by means of software improvements to Linux (IBM SUR Award) IBM India University Relations
- Hardware Security in the Context of a Connected World: Threats and Mitigations BRNS, DAE, MUMBAI
- Verification Challenges in Compression & Cryptographic Stacks in Quick Assist Technology INTEL CORPORATION, USA.
- DeepFake Catcher: Methods to Identify AI Generated Facial Videos and Images INTEL TECHNOLOGY INDIA PRIVATE LIMITED
- A Comprehensive Framework for Adversarial Evaluation of Random Number Generators: Theory and Implementation Science and Engineering Research Board (SERB)
Co-Principal Investigator
- Design and Development of FPGA Implementable Physical Unclonable Function for High Security Authentication Applications Indira Gandhi Centre For Atomic Research (IGCAR)
- Design Implementation & Evaluation of Encryption/Decryption Unit for IFF System HINDUSTAN AERONAUTICS LIMITED
- DESIGN OF A CONTROLLER FOR FINITE FIELD DIELD ARITHMETIC ON FPGAS DRDO
- Information Security Education and Awareness (ISEA) Project Phase-II Department of Electronics & Information Technology
- Next generation secured internet of things (SGDRI) SRIC, IIT KHARAGPUR
- Power attacks on stream ciphers and cache memory attacks Scientific analysis group
- Securing internet-of-things using unconventional cryptographic techniques Wipro Limited
Alumni Members
Ph. D. Students
Anju P J (2016)
Area of Research: Hardware Trojan Evaluation Platform on FPGA
Thesis Title: Remote Dynamic Partial Reconfiguration for Emerging IoT Applications: Threats and Countermeasures
Diangarti Bhalang Tariang (2022)
Area of Research: Digital Image Forensics
Thesis Title: Deep Learning-Based Multimedia Forensics and Malware Classification
Durga Prasad Sahoo (2017)
Area of Research: Machine Learning based Model-building Attacks on Physically Unclonable Functions
Thesis Title: Design and Analysis of Secure Physically Unclonable Function Compositions
Pranesh S Santikellur (2022)
Area of Research: Network Security
Thesis Title: Design and Analysis of Machine Learning based Modeling Attacks on Strong Physically Unclonable Functions
Ruchira Naskar (2014)
Area of Research: Reversible Digital Watermarking
Thesis Title: Reversible Watermarking of Digital Images: Algorithms and Implementation
Urbi Chatterjee (2020)
Area of Research: Hardware Security
Thesis Title: Design, Analysis and Implementation of Physically Unclonable Function based Authentication Frameworks for Internet-of-Things
MS Students
Aniket Roy (2018)
Area of Research: Parallel Processing
Thesis Title: Multimedia Security Through Reversible Image Watermarking and Digital Image Forensics
Ayan Palchaudhuri (2014)
Area of Research: FPGA based Hardware Design for Real-time Reversible Watermarking of Digital Images
Thesis Title: Architecture and Design Automation of High Performance Integer Arithmetic Soft Cores on Xilinx Field Programmable Gate Arrays
Indrasish Saha (2014)
Area of Research: Hardware Security
Thesis Title: Attacks on FPGA-based System Implementations
Pallabi Ghosh (2019)
Area of Research: Image Processing for Hardware Security
Thesis Title: Counterfeit Integrated Circuit Detection using Image Processing Techniques
Sayandeep Saha (2016)
Area of Research: Hardware Security
Thesis Title: Improved ATPG Techniques and Testability Based Metric for Hardware Trojan Horses
Vidya Govindan (2019)
Area of Research: Security of IoT and Embedded Systems
Thesis Title: FPGA based Hardware Trojan: Design, Implementation and Detection