No Record Found.

Patent
• Digitally-assisted linear amplifier for envelope tracking hybrid supply modulator by Rao K., Mandal D. , Prakash G. , Hemanth P. , Maity A. - (2026)
• Three-Level Output Gate Driver for 1V Thin-Oxide NMOSFET with Dynamic Body Biasing in SIDO Converters by Banerjee P., Keshri A. , Mandal D. , Kapat S. - (2025)
• Three-Level Output Gate Driver for Single Inductor Multi-Output DC-DC Converter by Keshri A., Mandal D. , Kapat S. - (2024)
• Two-Stage Zero Current Detection for Single Inductor Multi-Output (SIMO) Direct Current (DC)-DC Converter by Keshri A., Mandal D. , Kapat S. - (2024)
Symposium
• Three-Level Output Side Gate Driver for 1 V Thin-Gate-Oxide NMOSFET Switch in a SIDO Converter by Keshri A., Banerjee P. , Kanungo G. D., Chatterjee K. , Garg P. , Kapat S. , Mandal D. IEEE International Symposium on Circuits and Systems (ISCAS) - (2025)
• A Rail-to-Rail Input Class-AB Linear Amplifier with Improved Bandwidth and Slew-Rate for Envelope Tracking Supply Modulators by Prasad K. S., Hemanth P. , Mandal D. IEEE International Symposium on Circuits and Systems (ISCAS) - (2024)
• Sense Resistor-Free Analog Power Sensor for Boost Converter with 14.1% Gain Error and 9.4% Offset Error by Singh S., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Latin American Symposium on Circuits & Systems (LASCAS) 1-4 (2018)
• Adaptive Integrated CMOS Circulator by Ayati S. A., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Symposium on Radio Frequency Integrated Circuits (RFIC) 146-149 (2016)
• Disturbance-free BIST for Loop Characterization of DC-DC Buck Converters by Beohar N., Bakliwal P. , Roy S. , Mandal D. , Adell P. , Vermeire B. , Bakkaloglu B. , Ozev S. IEEE VLSI Test Symposium (VTS) 1-6 (2015)
• 1 V CMOS instrumentation amplifier with high DC electrode offset cancellation for ECG acquisition systems by Nanda C., Mukhopadhyay J. , Mandal D. , Chakrabarti S. IEEE Students Technology Symposium (TechSym) 21-25 (2010)
• High Voltage Tolerant Output Buffer Design for Mixed Voltage Interfaces by Mandal D., Mandal P. IEEE International Symposium on Circuits and Systems (ISCAS) 4277-4280 (2005)
Conferences
• A Digitally Controlled DC-DC Buck Converter with Automatic Digital PFM to PWM Transition Scheme by Beohar N., Mandal D. , Parasuram V. , Reddy A. M., Kumar A. , Malladi V. N., Pappu K. , Adell P. C., Bakkaloglu B. Applied Power Electronics Conference and Exposition (APEC) 517-522 (2021)
• Switching Battery Charger with Cascaded Two Loop Control Using Time-Based Techniques by Lim C. Y., Mandal D. , Bakkaloglu B. , Kiaei S. Applied Power Electronics Conference and Exposition (APEC) 1991-1995 (2021)
• Multi-Input Single-Inductor DCM Boost Converter with Dual-Loop MPPT Control for Multi-Junction PV Energy Harvesting by Geng Y., Mandal D. , Bakkaloglu B. , Kiaei S. Applied Power Electronics Conference and Exposition (APEC) 2662-2666 (2021)
• A 91%-Efficiency, Envelope-Tracking Modulator Using Hysteresis-Controlled Three-Level Switching Regulator and Slew-Rate Enhanced Linear Amplifier for LTE-80MHz Applications by Mahmoudidaryan P., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE International Solid-State Circuits Conference (ISSCC) 428-430 (2019)
• Integrated High-Efficiency Single-Inductor CCM Boost Converter for Multi-Junction PV Energy Harvesting by Peng Q., Mandal D. , Mahmoudidaryan P. , Bakkaloglu B. , Kiaei S. IEEE Applied Power Electronics Conference and Exposition (APEC) 1313-1318 (2019)
• 0.8 V 450 µW 2.4 GHz PLL using back-gate QVCO for ZigBee/BLE standard in 0.18 µm CMOS by Chary P., Peerla R. S., Regulagadda S. S., Naseeb M. A., Acharyya A. , Rajalaksmi P. , Mandal D. , Dutta A. IEEE International Conference on Microelectronics, Computing and Communications (MicroCom) 1-4 (2016)
• Fully-Integrated Switched-Capacitor Voltage Regulator with On-Chip Current-Sensing and Workload Optimization in 32nm SOI CMOS by Mi X., Mandal D. , Sathe V. , Bakkaloglu B. , Seo J. IEEE International Symposium on Low Power Electronics and Design (ISLPED) 140-145 (2015)
• Low Power Integrated On-Chip Current to Digital Converter by Marti-arbona E., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Applied Power Electronics Conference and Exposition (APEC) 654-657 (2015)
• 1.2 mW 2.4 GHz PLL for ZigBee and BLE standard in single-well 0.18 µm CMOS with efficient divider architecture by Chary P P., Peerla R. S., Regulagadda S. S., Naseeb M. A., Acharyya A. , Rajalaksmi P. , Mandal D. , Dutta A. IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) 17-20 (2015)
• PV Panel Power Optimization using Sub-Panel MPPT by Marti-arbona E., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Applied Power Electronics Conference and Exposition (APEC) 235-238 (2015)
• Spur suppression in frequency synthesizer using switched capacitor array by Mandal D., Mandal P. , Bhattacharyya T. K. IEEE International System-on-Chip (SoC) Design Conference 100-103 (2012)
• A CMOS instrumentation amplifier with low voltage and low noise for portable ECG monitoring systems by Nanda C., Mukhopadhyay J. , Mandal D. , Chakrabarti S. IEEE International Conference on Semiconductor Electronics (ICSE) 54-58 (2008)
• 7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer by Mandal D., Bhattacharyya T. K. IEEE International Conference on VLSI Design 156-164 (2007)
• Development of a Wireless Integrated Toxic and Explosive MEMS Based Gas Sensor by Bhattacharyya T. K., Sen S. , Mandal D. , Lahiri S. K. IEEE International Conference on VLSI Design - (2006)
Journal
• A Mixed-Signal Adaptive Ripple Canceler for Switching Regulators Providing 18 dB-24 dB of Ripple Rejection up to 1 MHz by Joshi K., Yang Z. , Fu C. , Mandal D. , Waterfall G. , Bakkaloglu B. IEEE Transactions on Power Electronics 35 10249-10259 (2020)
• Wideband Hybrid Envelope Tracking Modulator with Hysteretic-Controlled Three-Level Switching Converter and Slew-Rate Enhanced Linear Amplifier by Mahmoudidaryan P., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Journal of Solid-State Circuits 54 3336-3347 (2019)
• A 50 V Isolation, 100 MHz, 50 mW Single-Chip Junction Isolated DC-DC Converter with Self-Tuned Maximum Power Transfer Frequency by Liu C., Mandal D. , Yao Z. , Sun M. , Todsen J. , Johnson B. , Kiaei S. , Bakkaloglu B. IEEE Transactions on Circuits and Systems II: Express Briefs 66 1003-1007 (2019)
• Adaptively Biased Output Cap-Less NMOS LDO with 19 ns Settling-Time by Mandal D., Desai C. , Bakkaloglu B. , Kiaei S. IEEE Transactions on Circuits and Systems II: Express Briefs 66 167-171 (2019)
• Low-Power/Low-Voltage Integrated CMOS Sense Resistor-Free Analog Power/Current Sensor Compatible with High Voltage Switching DC-DC Converter by Singh S., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Transactions on Circuits and Systems I: Regular Papers 66 2208-2218 (2019)
• Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques by Beohar N., Malladi V. N., Mandal D. , Ozev S. , Bakkaloglu B. IEEE Transactions on Circuits and Systems I: Regular Papers 65 818-831 (2018)
• A 1.66 mV FOM Output Cap-Less LDO with Current-Reused Dynamic Biasing and 20 ns Settling Time by Desai C., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Solid-State Circuits Letters 1 50-53 (2018)
• Integrated Quasi-Circulator with RF Leakage Cancellation for Full-Duplex Wireless Transceivers by Ayati S. A., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Transactions on Microwave Theory and Techniques 66 1421-1430 (2018)
• A 100 mA, 99.11% Current Efficiency, 2 mVpp Ripple Digitally Controlled LDO With Active Ripple Suppression by Cheah M., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 696-704 (2017)
• A 50 mA 99.2% Peak Current-Efficiency, 250 ns Settling Time Digital Low Drop-Out Regulator with Transient Enhanced PI Controller by Lim C. Y., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 2360-2370 (2017)
• A 6A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter with ±1.5% Frequency and ±3.6% Current Sharing Error by Sun M., Yang Z. , Joshi K. , Mandal D. , Adell P. , Bakkaloglu B. IEEE Journal of Solid-State Circuits 52 3081-3094 (2017)
• A High-Voltage Compliant Current-to-Digital Sensor for DC-DC Converters in Standard CMOS Technology by Marti-arbona E., Mandal D. , Bakkaloglu B. , Kiaei S. IEEE Transactions on Power Electronics 32 2180-2188 (2017)
• Disturbance-Free Built-in Self-Test and Diagnosis for DC-DC Buck Converters by Shafiee M., Beohar N. , Bakliwal P. , Roy S. , Mandal D. , Bakkaloglu B. , Ozev S. ACM Transactions on Design Automation of Electronic Systems 23 1-22 (2017)
• Spur Reduction in Frequency Synthesizer with an Array of Switched Capacitors by Mandal D., Mandal P. , Bhattacharyya T. K. Wiley International Journal of Circuit Theory and Applications 43 1815-1831 (2015)
• Prediction of Reference Spur in Frequency Synthesizers by Mandal D., Mandal P. , Bhattacharyya T. K. IET Circuits, Devices and Systems 9 131-139 (2015)
• A 1.3 2.4-GHz 3.1-mW VCO Using Electro-Thermo-Mechanically Tunable Self-Assembled MEMS Inductor on HR Substrate by Bhattacharya A., Mandal D. , Bhattacharyya T. K. IEEE Transactions on Microwave Theory and Techniques 63 459-469 (2015)
• Spur reducing architecture of frequency synthesizer using switched capacitors by Mandal D., Mandal P. , Bhattacharyya T. K. IET Circuits, Devices and Systems 8 237-245 (2014)
• A technique to improve the linearization of frequency-voltage characteristic of LC-VCO by Mandal D., Bhattacharyya T. K. Springer Analog Integrated Circuits and Signal Processing 62 253-257 (2010)
• Implementation of CMOS Low-power Integer-N Frequency Synthesizer for SOC Design by Mandal D., Bhattacharyya T. K. Academy Journal of Computers 3 31-38 (2008)

Principal Investigator

• Design of Integrated Hybrid Envelope Tracking Supply Modulator for Power Amplifiers in 4G, LTE, LTE-A, 5G Mobile Communication Systems
• Design of Low-Power, Low-Cost Seismic Signal Acquisition Frontend Circuit

Co-Principal Investigator

• Single Input Multiple Output (SIMO) DC-DC Converter for Normal SOCs
• Synopsys CAD Laboratory Phase III